Theoritical considerations for buck mode switching regulators
Carl Nelson, in Analog Circuit Design, 2013
Error Amplifier
The error amplifier in Figure 11 is a single stage design with added inverters to allow the output to swing above and below the common mode input voltage. One side of the amplifier is tied to a trimmed internal reference voltage of 2.21V. The other input is brought out as the FB (feedback) pin. This amplifier has a GM (voltage in to current out) transfer function of ∼5000μmho. Voltage gain is determined by multiplying GM times the total equivalent output loading, consisting of the output resistance of Q4 and Q6 in parallel with the series RC external frequency compensation network. At DC, the external RC is ignored, and with a parallel output impedance for Q4 and Q6 of 400kΩ, voltage gain is ≈2000. At frequencies above a few hertz, voltage gain is determined by the external compensation, RC and CC.
Figure 11. Error Amplifier
AV=Gm2π•f•CCat mid-frequenciesAV=Gm•RCat high frequencies
Phase shift from the FB pin to the VC pin is 90° at mid-frequencies where the external CC is controlling gain, then drops back to 0° (actually 180° since FB is an inverting input) when the reactance of CC is small compared to RC. The low frequency “pole” where the reactance of CC is equal to the output impedance of Q4 and Q6 (r0), is:
FPOLE=12π•r0•Cr0≈400kΩ
Although fPOLE varies as much as 3:1 due to r0 variations, mid-frequency gain is dependent only on GM, which is specified much tighter on the data sheet. The higher frequency “zero” is determined solely by RC and CC:
fZERO=12π•RC•CC
The error amplifier has asymmetrical peak output current. Q3 and Q4 current mirrors are unity gain, but the Q6 mirror has a gain of 1.8 at output null and a gain of 8 when the FB pin is high (Q1 current = 0). This results in a maximum positive output current of 140μA and a maximum negative (sink) output current of =1.1mA. The asymmetry is deliberate—it results in much less regulator output overshoot during rapid start-up or following the release of an output overload. Amplifier offset is kept low by area scaling Q1 and Q2 at 1.8:1.
Amplifier swing is limited by the internal 5.8V supply for positive outputs and by D1 and D2 when the output goes low. Low clamp voltage is approximately one diode drop (−0.7V – 2mV/°C).
Note that both the FB pin and the VC pin have other internal connections. Refer to the frequency shifting and synchronizing discussions.
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Linear regulator
Keng C. Wu, in Power Electronic System Design, 2021
8.1.1.1 Open loop
Surrounding the error amplifier and the output feedback divider, R1 and R2, the inverting input node, Vn, and the noninverting node, Vp, voltages are
(8.1)Vn=R2R1+R2Vo+Vos+R1R2R1+R2Ib,Vp=Vref
The error amplifier output therefore gives
(8.2)V2=A(Vp−Vn)=A(Vref−R2R1+R2Vo−Vos−R1R2R1+R2Ib)
The base-emitter loop of transistor Q1 gives
(8.3)R3IB1+Vbe1+R4(1+hFE1)IB1=V2,approximationIB1=ISeV2−[R3+(1+hFE1)R4]IB1VT,exact
The exact expression invokes transistor p-n junction saturation current, Is, and thermal voltage, VT.
In other words, the Q1 base current (approximation) is
(8.4)IB1=V2−Vbe1R3+R4(1+hFE1)=A(Vref−R2R1+R2Vo−Vos−R1R2R1+R2Ib)−Vbe1R3+R4(1+hFE1)
And the Q2 base current (approximation) is
(8.5)IB2=hFE1IB1−Vbe2R5=hFE1A(Vref−R2R1+R2Vo−Vos−R1R2R1+R2Ib)−Vbe1R3+R4(1+hFE1)−Vbe2R5
Clearly, the output voltage is translated to a control current that is responsible for regulating the output given a known reference, Vref. This concludes the first part.
The other part, power train, yields
(8.6)Vo=(R1+R2)RLR1+R2+RLIC2=(R1+R2)RLR1+R2+RLhFE2·IB2Vi=Vce+Vo
where Vce is the collector-to-emitter drop.
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Current-Fed Converter
Keng Wu, in Power Converters with Digital Filter Feedback Control, 2016
10.5 I-fed converter with digital control
The analog error amplifier identified in Section 10.3, following the modulator gain evaluation, is transformed to the z-domain with a bilinear transformation constant C = 2 MHz (converter switching frequency 100 kHz, sampling frequency 1 MHz, transform constant = twice of sampling). The resulting z-domain digital filter function is in the form of (1.23) with these coefficients,
a0=7.451×10−4a1=−7.337×10−4a2=−7.451×10−4a3=7.338×10−4 b1=−2.959b2=2.919b3=−0.96
Figure 10.7a–d shows the SIMULINK schematic with digital filter and performance in time domain.
Figure 10.7. SIMULINK Schematic with Digital Filter.
(a) Inductor current, (b) secondary current, (c) output voltage, and (d) input current.
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Feedback Loop Analysis and Stability
Sanjaya Maniktala, in Switching Power Supplies A — Z (Second Edition), 2012
Pulse-Width Modulator Transfer Function
The output of the error amplifier (sometimes called “COMP,” sometimes “EA-out,” sometimes “control voltage”) is applied to one of the inputs of the PWM comparator. This is the terminal marked “Control” in Figures 12.9 and 12.10. On the other input of this PWM comparator, we apply a sawtooth voltage ramp — either internally generated from the clock when using “voltage-mode control,” or derived from the current ramp when using “current-mode control” (explained later). Thereafter, by standard comparator action, we get pulses of desired width with which to drive the switch.
Since the feedback signal coming from the output rail of the power supply goes to the inverting input of the error amplifier, if the output is below the set regulation level, the output of the error amplifier goes high. This causes the PWM to increase the pulse width (duty cycle) and thus try to make the output voltage rise. Similarly, if the output of the power supply goes above its set value, the error amplifier output goes low, causing the duty cycle to decrease (see upper third of Figure 12.11).
As mentioned previously, the output of the PWM stage is duty cycle, and its input is the “control voltage” or the “EA-out.” So, as we said, the gain of this stage is not a dimensionless quantity, but has units of 1/V. From the middle of Figure 12.11, we can see that this gain is equal to 1/VRAMP, where VRAMP is the peak-to-peak amplitude of the ramp sawtooth.
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DCM Boost Converter with Voltage-Mode Control
Keng Wu, in Power Converters with Digital Filter Feedback Control, 2016
7.6 Conversion to digital control
We now want to convert the analog error amplifier, EA(s), identified in Section 7.4, to its digital equivalent H(z). It turns out that some property not well understood, at least to this author, exists. From the EA(ω) plot in frequency domain, 100 kHz sampling was thought to be a good choice, but it ends up having a frequency response, H(ω), that is utterly incompatible as shown in Figure 7.8, with the analog version.
Figure 7.8. Incompatible Digital Filter Sampled at 100 kHz.
Increasing the sampling frequency to 300 kHz improves matching, Figure 7.9, with losses in high frequency.
Figure 7.9. Improved Matching at 300 kHz Sampling.
Increasing the sampling frequency further to 800 kHz improves more, Figure 7.10, but further increase to 900 kHz makes it worse. We therefore settle for sampling at 800 kHz.
Figure 7.10. Better Matching at High Frequency with 800 kHz Sampling.
At 800 kHz sampling, the polynomial coefficients for the corresponding HII(z), (1.19), is given as,
a0=5.392×10−3a1=38.663×10−6a2=−5.353×10−3 b1=−1.991×10−0b2=991.465×10−3
With the digital filter identified, Figure 7.1 is transformed to its digital control version, Figure 7.11. The digital filter is also proved to be stable, Figure 7.12, with poles within the unit circle of z-plane.
Figure 7.11. Boost Converter with Digital Filter in Feedback Loop.
Figure 7.12. Digital Filter is Stable.
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Forward Converter with Voltage-Mode Control
Keng Wu, in Power Converters with Digital Filter Feedback Control, 2016
1.7 Other approaches and considerations
In the process of converting an analog error amplifier to digital in Section 1.4, the bilinear transform was invoked. The transform is considered valid, based on the fact of acceptable mathematical approximation alone. It does not take into consideration its physical significance. Briefly, in particular the choice of constant C, there were many choices, none perfect. One approach attempts to match both at a single, chosen frequency. In another, the responses of both versions across a low frequency band are made almost equal. Both efforts set an eye on the performance in the frequency domain. There are alternatives, of course, and that is changing the focus to the time domain. One is called impulse invariance method. It implies that the impulse response of a digital filter is forced to be identical to the impulse of its analog counterpart. It is basically a procedural matter that does not require cumbersome theoretical support. We outline only the process here and will give a demonstration later in an example.
Three steps are called for in the impulse invariance method. Step one takes the inverse Laplace transform of the analog compensator function (inverting sign excluded), identified by way of Section 1.3. This yields the time-domain impulse response of the corresponding analog amplifier. Step two takes z-transform of the impulse response function in the time domain. Then the last step follows by arranging the z-domain function in the form of (1.24).
In the analog world, circuit operations and performances are sensitive to the value of components. Digital filters obtained through the above fare even worse by the fact of (1.17), (1.19), (1.20), and (1.23). The performance of a digital filter is extremely sensitive to the coefficients of its numerator and denominator polynomial. Readers are strongly advised to retain coefficients’ numerical precision to at the least 10 decimal places.
The last, but not the least, concern is the local stability of the compensator. Poles of HII(z) in (1.19), HIII(z) in (1.23), or in general, H(z) of (1.24), must lie within the unit circle in the z-plane. We will see to it in the example to follow.
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Forward Converter with Current-Mode Control
Keng Wu, in Power Converters with Digital Filter Feedback Control, 2016
2.5 Matlab SIMULINK simulation
In both Figures 2.1 and 2.2, a type-III error amplifier was employed for demonstration purpose as well as for a 60°-phase margin. It turns out that if the desired phase margin is reduced to 45° at the same crossover frequency of 10 kHz, a type-II error amplifier with two less components can perform just as well for current-mode control. The reader is invited to confirm, with R1a = 2K preselected, C1a = 0.0029 μF, C2a = 0.009 μF, and R2a = 3.6K. In the depictedSIMULINK models, type-II error amplifiers are shown. Figure 2.12 gives a physical device model and Figure 2.12a–h present simulation plots. Figure 2.13 replaces the physical model with continuous transfer function H(s), while Figure 2.14 plugs in the corresponding digital filter.
Figure 2.12. SIMULINK Model with Error Amp Represented by Physical Device.
(a) Output voltage, (b) error voltage, (c) D1 and D2 cathode, (d) input current, (e) switch current, (f) inductor current, (g) D1 current, (h) D2 current.
Figure 2.13. SIMULINK Model with Error Amp in H(s) Form.
(a) Output voltage. (b) error voltage. (c) D1 and D2 cathode. (d) input current. (e) switch current. (f) inductor current. (g) D1 current. (h) D2 current.
Figure 2.14. SIMULINK Model with Error Amp in Hz Form.
(a) Output voltage, (b) error voltage, (c) D1 and D2 cathode, (d) input current. (e) switch current, (f) inductor current, (g) D1 current, (h) D2 current.
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Switch-mode DC/DC converters
Keng C. Wu, in Power Electronic System Design, 2021
9.14 Close loop—digital
So far, the key controller; which is the error amplifier identified as, for instance, EA(s) in Fig. 9.66; remains entirely in analog forms using analog integrated circuits and passive RC components. This fact had also held true for decades covering the invention of black/white TV, color TV, audio cassette tape, VCR, etc. and later improvements of those products. Then, perhaps in early 1980s, devices with discrete recording and readout, not digital yet, began to show up. Discrete signal is basically just a sampled, discontinuous staircase approximation of its analog counterpart. While a true digital signal further represents each and every discrete sample in stream of binary 0/1 format including synchronization, identification, data, encryption, action, error correction, etc. With the advance of understanding in digital signal processing starting in early 1970s and mostly limited to post processing, instead of real time, early 1980s also saw some bright minds beginning to probe the possibility of digital filter and control for power converters. However, after almost 40 years, the progress is far from satisfactory. As late as 2017, published material discussing power processing with digital feedback still carried significant misconceptions, or errors.
On Oct. 26, 2017, at the invitation of Electronic Design, Penton Publication (On-Line version), this author published “A Step-by-Step Primer on Digital Power-Supply Design”; [http://www.electronicdesign.com/power/step-step-primer-digital-power-supply-design].
Considering the article length and the standing alone nature, it is included as an appendix; Appendix I.
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LT1070 design manual
Carl Nelson, in Analog Circuit Design, 2011
Feedback pin
The feedback pin is the inverting input to a single stage error amplifier. The noninverting input to this amplifier is internally tied to a 1.244V reference as shown in Figure 5.4.
Figure 5.4.
Input bias current of the amplifier is typically 350nA with the output of the amplifier in its linear region. The amplifier is a gm type, meaning that it has high output impedance with controlled voltage-to-current gain (gm ≈ 4400μmhos). DC voltage gain with no load is ≈ 800.
The feedback pin has a second function; it is used to program the LT1070 for normal or flyback-regulated operation (see description of block diagram). In Figure 5.4, Q53 is biased with a base voltage approximately 1V. This clamps the feedback pin to about 0.4V when current is drawn out of the pin. A current of ≈10μA or higher through Q53 forces the regulator to switch from normal operation to flyback mode, but this threshold current can vary from 3μA to 30μA. The LT1070 is in flyback mode during normal start-up until the feedback pin rises above 0.45V. The resistor divider used to set output voltage will draw current out of the feedback pin until the output voltage is up to about 33% of its regulated value.
If it is desired to run the LT1070 in the fully isolated flyback mode, a single resistor is tied from the feedback pin to ground. The feedback pin then sits at a voltage of ≈ 0.4V for R = 8.2k. The actual voltage depends on resistor value since the feedback pin has about 200Ω output impedance in this mode. 500μA in the resistor will drop the feedback pin voltage from 0.4V to 0.3V. Minimum current through the resistor to guarantee flyback operation is 50μA. Actual resistor value is chosen to fine-trim flyback regulated voltage. (See discussion of isolated flyback mode operation and graphs of feedback pin characteristics.)
An internal 30Ω resistor and 5.6V Zener protect the feedback pin from overvoltage stress. Maximum transient voltage is ±15V. This high transient condition most commonly occurs during fast fall time output shorts if a feedforward capacitor is used around the feedback divider. If a feedforward capacitor is used for DC output voltages greater than 15V, a resistor equal to VOUT/20mA should be used between the divider node and the feedback pin as shown in Figure 5.5.
Figure 5.5.
Keep in mind when using the LT1070 that the feedback pin reference voltage is referred to the ground pin of the regulator, and the ground pin can have switch currents exceeding 5A. Any resistance in the ground pin connection will degrade load regulation. Best regulation is obtained by tying the grounded end of the feedback divider directly to the ground pin of the LT1070, as a separate connection from the power ground. This limits output voltage errors to just the drop across the ground pin resistance instead of multiplying it by the feedback divider ratio. See discussion of ground pin.
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Space Interference
Reinaldo Perez, in Wireless Communications Design Handbook, 1998
4.6.7.2 Transient Effects in SMPSs
In the simplified circuit of a switching-mode power supply, an error amplifier compares output voltage Vout with a reference Vref and controls the duty cycle, D, via a pulse width modulator as shown in Figure 4.32. The output capacitor Cout is represented by its equivalent circuit that includes the equivalent series resistance (ESR) and the equivalent series inductance (ESL). When we have a load step δI, current through the choke inductance L cannot be instantly changed. There will always be a finite time t needed for L to accommodate δI, given by the expression
Figure 4.32. Simplified diagram of an SMPS with output capacitor model (ESR & ESL).
(4.10)t>LδIVinDmax−Vout−Vdiode,
where Dmax is the maximum duty cycle and Vdiode is the diode’s voltage drop. The choke current Ichoke slews to the new load current, but before it does that Iload flows through Cout. This results in an output voltage deviation δVout that may be as much as
(4.11)δVout≤ESLdIloaddt+ESRδI,
where dIload/dt is the load’s current slew rate (A/sec).The SMPS’s Cout acts as a reservoir for these current transients. The delay that is observed is compounded by the wiring and possible long traces in the PCB. As can be observed in Figure 4.32, traces have self-inductances and resistances, and when Iload changes from Faraday’s law, Lwire/trace will cause an initial voltage deviation δV given by
(4.12)δV=−Lwire/tracesdIloaddt.
Furthermore, Rwire/trace will cause an input voltage drop as Iload slews. The time that is needed to change a current through load wires/traces in a PCB is given by
(4.13)t=tdelay+trise,
where tdelay is the SMPS delay time and trise is the time needed for Iwire/traces to catch up to the load current, given by
(4.14)trise=tdelaydIload/dtVmax−VloadLwire/trace−dIloaddt
where Vmax is the maximum output voltage during the transient recovery of the supply. The output load will experience a dip of as much as
(4.15)δVout=ESRtdIloaddt+t2dIload/dtCload.
A computer simulation of a circuit of the type shown in Figure 4.32 using SPICE can show the effects of load wire/traces, inductances, and external capacitance, as shown in Figure 4.33.
Figure 4.33. Load transients resulting from modeling output loads of an SMPS.
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Theoritical considerations for buck mode switching regulators
Carl Nelson, in Analog Circuit Design, 2013
Error Amplifier
The error amplifier in Figure 11 is a single stage design with added inverters to allow the output to swing above and below the common mode input voltage. One side of the amplifier is tied to a trimmed internal reference voltage of 2.21V. The other input is brought out as the FB (feedback) pin. This amplifier has a GM (voltage in to current out) transfer function of ∼5000μmho. Voltage gain is determined by multiplying GM times the total equivalent output loading, consisting of the output resistance of Q4 and Q6 in parallel with the series RC external frequency compensation network. At DC, the external RC is ignored, and with a parallel output impedance for Q4 and Q6 of 400kΩ, voltage gain is ≈2000. At frequencies above a few hertz, voltage gain is determined by the external compensation, RC and CC.
Figure 11. Error Amplifier
AV=Gm2π•f•CCat mid-frequenciesAV=Gm•RCat high frequencies
Phase shift from the FB pin to the VC pin is 90° at mid-frequencies where the external CC is controlling gain, then drops back to 0° (actually 180° since FB is an inverting input) when the reactance of CC is small compared to RC. The low frequency “pole” where the reactance of CC is equal to the output impedance of Q4 and Q6 (r0), is:
FPOLE=12π•r0•Cr0≈400kΩ
Although fPOLE varies as much as 3:1 due to r0 variations, mid-frequency gain is dependent only on GM, which is specified much tighter on the data sheet. The higher frequency “zero” is determined solely by RC and CC:
fZERO=12π•RC•CC
The error amplifier has asymmetrical peak output current. Q3 and Q4 current mirrors are unity gain, but the Q6 mirror has a gain of 1.8 at output null and a gain of 8 when the FB pin is high (Q1 current = 0). This results in a maximum positive output current of 140μA and a maximum negative (sink) output current of =1.1mA. The asymmetry is deliberate—it results in much less regulator output overshoot during rapid start-up or following the release of an output overload. Amplifier offset is kept low by area scaling Q1 and Q2 at 1.8:1.
Amplifier swing is limited by the internal 5.8V supply for positive outputs and by D1 and D2 when the output goes low. Low clamp voltage is approximately one diode drop (−0.7V – 2mV/°C).
Note that both the FB pin and the VC pin have other internal connections. Refer to the frequency shifting and synchronizing discussions.
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Linear regulator
Keng C. Wu, in Power Electronic System Design, 2021
8.1.1.1 Open loop
Surrounding the error amplifier and the output feedback divider, R1 and R2, the inverting input node, Vn, and the noninverting node, Vp, voltages are
(8.1)Vn=R2R1+R2Vo+Vos+R1R2R1+R2Ib,Vp=Vref
The error amplifier output therefore gives
(8.2)V2=A(Vp−Vn)=A(Vref−R2R1+R2Vo−Vos−R1R2R1+R2Ib)
The base-emitter loop of transistor Q1 gives
(8.3)R3IB1+Vbe1+R4(1+hFE1)IB1=V2,approximationIB1=ISeV2−[R3+(1+hFE1)R4]IB1VT,exact
The exact expression invokes transistor p-n junction saturation current, Is, and thermal voltage, VT.
In other words, the Q1 base current (approximation) is
(8.4)IB1=V2−Vbe1R3+R4(1+hFE1)=A(Vref−R2R1+R2Vo−Vos−R1R2R1+R2Ib)−Vbe1R3+R4(1+hFE1)
And the Q2 base current (approximation) is
(8.5)IB2=hFE1IB1−Vbe2R5=hFE1A(Vref−R2R1+R2Vo−Vos−R1R2R1+R2Ib)−Vbe1R3+R4(1+hFE1)−Vbe2R5
Clearly, the output voltage is translated to a control current that is responsible for regulating the output given a known reference, Vref. This concludes the first part.
The other part, power train, yields
(8.6)Vo=(R1+R2)RLR1+R2+RLIC2=(R1+R2)RLR1+R2+RLhFE2·IB2Vi=Vce+Vo
where Vce is the collector-to-emitter drop.
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Current-Fed Converter
Keng Wu, in Power Converters with Digital Filter Feedback Control, 2016
10.5 I-fed converter with digital control
The analog error amplifier identified in Section 10.3, following the modulator gain evaluation, is transformed to the z-domain with a bilinear transformation constant C = 2 MHz (converter switching frequency 100 kHz, sampling frequency 1 MHz, transform constant = twice of sampling). The resulting z-domain digital filter function is in the form of (1.23) with these coefficients,
a0=7.451×10−4a1=−7.337×10−4a2=−7.451×10−4a3=7.338×10−4 b1=−2.959b2=2.919b3=−0.96
Figure 10.7a–d shows the SIMULINK schematic with digital filter and performance in time domain.
Figure 10.7. SIMULINK Schematic with Digital Filter.
(a) Inductor current, (b) secondary current, (c) output voltage, and (d) input current.
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Feedback Loop Analysis and Stability
Sanjaya Maniktala, in Switching Power Supplies A — Z (Second Edition), 2012
Pulse-Width Modulator Transfer Function
The output of the error amplifier (sometimes called “COMP,” sometimes “EA-out,” sometimes “control voltage”) is applied to one of the inputs of the PWM comparator. This is the terminal marked “Control” in Figures 12.9 and 12.10. On the other input of this PWM comparator, we apply a sawtooth voltage ramp — either internally generated from the clock when using “voltage-mode control,” or derived from the current ramp when using “current-mode control” (explained later). Thereafter, by standard comparator action, we get pulses of desired width with which to drive the switch.
Since the feedback signal coming from the output rail of the power supply goes to the inverting input of the error amplifier, if the output is below the set regulation level, the output of the error amplifier goes high. This causes the PWM to increase the pulse width (duty cycle) and thus try to make the output voltage rise. Similarly, if the output of the power supply goes above its set value, the error amplifier output goes low, causing the duty cycle to decrease (see upper third of Figure 12.11).
As mentioned previously, the output of the PWM stage is duty cycle, and its input is the “control voltage” or the “EA-out.” So, as we said, the gain of this stage is not a dimensionless quantity, but has units of 1/V. From the middle of Figure 12.11, we can see that this gain is equal to 1/VRAMP, where VRAMP is the peak-to-peak amplitude of the ramp sawtooth.
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DCM Boost Converter with Voltage-Mode Control
Keng Wu, in Power Converters with Digital Filter Feedback Control, 2016
7.6 Conversion to digital control
We now want to convert the analog error amplifier, EA(s), identified in Section 7.4, to its digital equivalent H(z). It turns out that some property not well understood, at least to this author, exists. From the EA(ω) plot in frequency domain, 100 kHz sampling was thought to be a good choice, but it ends up having a frequency response, H(ω), that is utterly incompatible as shown in Figure 7.8, with the analog version.
Figure 7.8. Incompatible Digital Filter Sampled at 100 kHz.
Increasing the sampling frequency to 300 kHz improves matching, Figure 7.9, with losses in high frequency.
Figure 7.9. Improved Matching at 300 kHz Sampling.
Increasing the sampling frequency further to 800 kHz improves more, Figure 7.10, but further increase to 900 kHz makes it worse. We therefore settle for sampling at 800 kHz.
Figure 7.10. Better Matching at High Frequency with 800 kHz Sampling.
At 800 kHz sampling, the polynomial coefficients for the corresponding HII(z), (1.19), is given as,
a0=5.392×10−3a1=38.663×10−6a2=−5.353×10−3 b1=−1.991×10−0b2=991.465×10−3
With the digital filter identified, Figure 7.1 is transformed to its digital control version, Figure 7.11. The digital filter is also proved to be stable, Figure 7.12, with poles within the unit circle of z-plane.
Figure 7.11. Boost Converter with Digital Filter in Feedback Loop.
Figure 7.12. Digital Filter is Stable.
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Forward Converter with Voltage-Mode Control
Keng Wu, in Power Converters with Digital Filter Feedback Control, 2016
1.7 Other approaches and considerations
In the process of converting an analog error amplifier to digital in Section 1.4, the bilinear transform was invoked. The transform is considered valid, based on the fact of acceptable mathematical approximation alone. It does not take into consideration its physical significance. Briefly, in particular the choice of constant C, there were many choices, none perfect. One approach attempts to match both at a single, chosen frequency. In another, the responses of both versions across a low frequency band are made almost equal. Both efforts set an eye on the performance in the frequency domain. There are alternatives, of course, and that is changing the focus to the time domain. One is called impulse invariance method. It implies that the impulse response of a digital filter is forced to be identical to the impulse of its analog counterpart. It is basically a procedural matter that does not require cumbersome theoretical support. We outline only the process here and will give a demonstration later in an example.
Three steps are called for in the impulse invariance method. Step one takes the inverse Laplace transform of the analog compensator function (inverting sign excluded), identified by way of Section 1.3. This yields the time-domain impulse response of the corresponding analog amplifier. Step two takes z-transform of the impulse response function in the time domain. Then the last step follows by arranging the z-domain function in the form of (1.24).
In the analog world, circuit operations and performances are sensitive to the value of components. Digital filters obtained through the above fare even worse by the fact of (1.17), (1.19), (1.20), and (1.23). The performance of a digital filter is extremely sensitive to the coefficients of its numerator and denominator polynomial. Readers are strongly advised to retain coefficients’ numerical precision to at the least 10 decimal places.
The last, but not the least, concern is the local stability of the compensator. Poles of HII(z) in (1.19), HIII(z) in (1.23), or in general, H(z) of (1.24), must lie within the unit circle in the z-plane. We will see to it in the example to follow.
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Forward Converter with Current-Mode Control
Keng Wu, in Power Converters with Digital Filter Feedback Control, 2016
2.5 Matlab SIMULINK simulation
In both Figures 2.1 and 2.2, a type-III error amplifier was employed for demonstration purpose as well as for a 60°-phase margin. It turns out that if the desired phase margin is reduced to 45° at the same crossover frequency of 10 kHz, a type-II error amplifier with two less components can perform just as well for current-mode control. The reader is invited to confirm, with R1a = 2K preselected, C1a = 0.0029 μF, C2a = 0.009 μF, and R2a = 3.6K. In the depictedSIMULINK models, type-II error amplifiers are shown. Figure 2.12 gives a physical device model and Figure 2.12a–h present simulation plots. Figure 2.13 replaces the physical model with continuous transfer function H(s), while Figure 2.14 plugs in the corresponding digital filter.
Figure 2.12. SIMULINK Model with Error Amp Represented by Physical Device.
(a) Output voltage, (b) error voltage, (c) D1 and D2 cathode, (d) input current, (e) switch current, (f) inductor current, (g) D1 current, (h) D2 current.
Figure 2.13. SIMULINK Model with Error Amp in H(s) Form.
(a) Output voltage. (b) error voltage. (c) D1 and D2 cathode. (d) input current. (e) switch current. (f) inductor current. (g) D1 current. (h) D2 current.
Figure 2.14. SIMULINK Model with Error Amp in Hz Form.
(a) Output voltage, (b) error voltage, (c) D1 and D2 cathode, (d) input current. (e) switch current, (f) inductor current, (g) D1 current, (h) D2 current.
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Switch-mode DC/DC converters
Keng C. Wu, in Power Electronic System Design, 2021
9.14 Close loop—digital
So far, the key controller; which is the error amplifier identified as, for instance, EA(s) in Fig. 9.66; remains entirely in analog forms using analog integrated circuits and passive RC components. This fact had also held true for decades covering the invention of black/white TV, color TV, audio cassette tape, VCR, etc. and later improvements of those products. Then, perhaps in early 1980s, devices with discrete recording and readout, not digital yet, began to show up. Discrete signal is basically just a sampled, discontinuous staircase approximation of its analog counterpart. While a true digital signal further represents each and every discrete sample in stream of binary 0/1 format including synchronization, identification, data, encryption, action, error correction, etc. With the advance of understanding in digital signal processing starting in early 1970s and mostly limited to post processing, instead of real time, early 1980s also saw some bright minds beginning to probe the possibility of digital filter and control for power converters. However, after almost 40 years, the progress is far from satisfactory. As late as 2017, published material discussing power processing with digital feedback still carried significant misconceptions, or errors.
On Oct. 26, 2017, at the invitation of Electronic Design, Penton Publication (On-Line version), this author published “A Step-by-Step Primer on Digital Power-Supply Design”; [http://www.electronicdesign.com/power/step-step-primer-digital-power-supply-design].
Considering the article length and the standing alone nature, it is included as an appendix; Appendix I.
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LT1070 design manual
Carl Nelson, in Analog Circuit Design, 2011
Feedback pin
The feedback pin is the inverting input to a single stage error amplifier. The noninverting input to this amplifier is internally tied to a 1.244V reference as shown in Figure 5.4.
Figure 5.4.
Input bias current of the amplifier is typically 350nA with the output of the amplifier in its linear region. The amplifier is a gm type, meaning that it has high output impedance with controlled voltage-to-current gain (gm ≈ 4400μmhos). DC voltage gain with no load is ≈ 800.
The feedback pin has a second function; it is used to program the LT1070 for normal or flyback-regulated operation (see description of block diagram). In Figure 5.4, Q53 is biased with a base voltage approximately 1V. This clamps the feedback pin to about 0.4V when current is drawn out of the pin. A current of ≈10μA or higher through Q53 forces the regulator to switch from normal operation to flyback mode, but this threshold current can vary from 3μA to 30μA. The LT1070 is in flyback mode during normal start-up until the feedback pin rises above 0.45V. The resistor divider used to set output voltage will draw current out of the feedback pin until the output voltage is up to about 33% of its regulated value.
If it is desired to run the LT1070 in the fully isolated flyback mode, a single resistor is tied from the feedback pin to ground. The feedback pin then sits at a voltage of ≈ 0.4V for R = 8.2k. The actual voltage depends on resistor value since the feedback pin has about 200Ω output impedance in this mode. 500μA in the resistor will drop the feedback pin voltage from 0.4V to 0.3V. Minimum current through the resistor to guarantee flyback operation is 50μA. Actual resistor value is chosen to fine-trim flyback regulated voltage. (See discussion of isolated flyback mode operation and graphs of feedback pin characteristics.)
An internal 30Ω resistor and 5.6V Zener protect the feedback pin from overvoltage stress. Maximum transient voltage is ±15V. This high transient condition most commonly occurs during fast fall time output shorts if a feedforward capacitor is used around the feedback divider. If a feedforward capacitor is used for DC output voltages greater than 15V, a resistor equal to VOUT/20mA should be used between the divider node and the feedback pin as shown in Figure 5.5.
Figure 5.5.
Keep in mind when using the LT1070 that the feedback pin reference voltage is referred to the ground pin of the regulator, and the ground pin can have switch currents exceeding 5A. Any resistance in the ground pin connection will degrade load regulation. Best regulation is obtained by tying the grounded end of the feedback divider directly to the ground pin of the LT1070, as a separate connection from the power ground. This limits output voltage errors to just the drop across the ground pin resistance instead of multiplying it by the feedback divider ratio. See discussion of ground pin.
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Space Interference
Reinaldo Perez, in Wireless Communications Design Handbook, 1998
4.6.7.2 Transient Effects in SMPSs
In the simplified circuit of a switching-mode power supply, an error amplifier compares output voltage Vout with a reference Vref and controls the duty cycle, D, via a pulse width modulator as shown in Figure 4.32. The output capacitor Cout is represented by its equivalent circuit that includes the equivalent series resistance (ESR) and the equivalent series inductance (ESL). When we have a load step δI, current through the choke inductance L cannot be instantly changed. There will always be a finite time t needed for L to accommodate δI, given by the expression
Figure 4.32. Simplified diagram of an SMPS with output capacitor model (ESR & ESL).
(4.10)t>LδIVinDmax−Vout−Vdiode,
where Dmax is the maximum duty cycle and Vdiode is the diode’s voltage drop. The choke current Ichoke slews to the new load current, but before it does that Iload flows through Cout. This results in an output voltage deviation δVout that may be as much as
(4.11)δVout≤ESLdIloaddt+ESRδI,
where dIload/dt is the load’s current slew rate (A/sec).The SMPS’s Cout acts as a reservoir for these current transients. The delay that is observed is compounded by the wiring and possible long traces in the PCB. As can be observed in Figure 4.32, traces have self-inductances and resistances, and when Iload changes from Faraday’s law, Lwire/trace will cause an initial voltage deviation δV given by
(4.12)δV=−Lwire/tracesdIloaddt.
Furthermore, Rwire/trace will cause an input voltage drop as Iload slews. The time that is needed to change a current through load wires/traces in a PCB is given by
(4.13)t=tdelay+trise,
where tdelay is the SMPS delay time and trise is the time needed for Iwire/traces to catch up to the load current, given by
(4.14)trise=tdelaydIload/dtVmax−VloadLwire/trace−dIloaddt
where Vmax is the maximum output voltage during the transient recovery of the supply. The output load will experience a dip of as much as
(4.15)δVout=ESRtdIloaddt+t2dIload/dtCload.
A computer simulation of a circuit of the type shown in Figure 4.32 using SPICE can show the effects of load wire/traces, inductances, and external capacitance, as shown in Figure 4.33.
Figure 4.33. Load transients resulting from modeling output loads of an SMPS.
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Усилитель — ошибка
Cтраница 1
Усилитель ошибки может входить в контур управления. В этом случае на один из его входов должен быть подан опорный сигнал, а на другой — часть управляемого выходного напряжения. Другой возможный вариант — исключение УО, но только в случае, если имеется возможность измерить сигнал вне микросхемы, усилить его и только затем направить к одному из выводов контроллера. Схема на рис. 22.17 показывает применение микросхемы при ее питании от первичной стороны преобразователя, там же находятся ключи моста и источник входного напряжения. Выходное напряжение преобразователя гальванически не связано с первичной стороной, поэтому для передачи информации о выходном напряжении использован оптрон DA.
[2]
В усилитель ошибки по току поступает задание токового опорного сигнала. Усилитель ошибки по току на другом своем входе воспринимает сигнал о нагрузке преобразователя либо непосредственно, либо через отдельный дифференциальный ОУ. Сказанное поясняется схемой, показанной на рис. 23.11. На схеме DI и D2 — развязывающие диоды, позволяющие подключать сигналы каналов напряжения и тока.
[4]
Используя усилитель ошибки в режиме работы вблизи уровня земли ( делитель для съема выходного напряжения дает малую долю выхода), можно построить высоковольтный стабилизатор, в котором под высоким напряжением будет находиться только проходной транзистор и формирователь, работающий на него. На рис. 6.47 показан принцип построения такой схемы. В данном случае, это стабилизированный источник на напряжение от 100 до 500 В, в котором использованы проходной — МОП-транзистор и формирователь.
[5]
В качестве усилителя ошибки используется операционный усилитель, сравнивающий регулируемую долю выхода с прецизионным эталонным источником 5 В. Остальные компоненты выполняют более тонкую, но необходимую работу. Эта схема является исключением из общего правила, которое гласит, что транзисторные схемы не представляют электрической опасности.
[7]
В качестве усилителя ошибки применен полупроводниковый усилитель, выходной сигнал которого управляет широтным модулятором.
[9]
Выходной сигнал усилителя ошибки по напряжению при рассмотриваемом методе управляет мощностью, доставляемой в нагрузку корректора.
[10]
В этот момент усилитель ошибки прекращает питать базу транзистора VT1 и нерегулируемое входное напряжение отключается. Энергия, запасенная в катушке индуктивности L1, служит причиной возникновения импульса напряжения Ux, имеющего отрицательную полярность. Этот импульс поглощается открытым демпфирующим диодом VDI. Ток индуктивности 1C подается в нагрузку. Когда ток в катушке индуктивности станет ниже уровня тока нагрузки, конденсатор С1 начнет разряжаться и выходное напряжение ( а следовательно, и напряжение на инвертирующем входе усилителя ошибки) уменьшится.
[12]
Дг поступает на усилитель ошибки У3 и далее в фазочувст-вительный детектор ФД, усилитель мощности У, питающий серводвигатель Дв. Последний через самотормозящуюся передачу обеспечивает вращение коронного колеса, компенсируя дополнительные ( из-за погрешностей кинематической цепи) повороты сателлита.
[13]
Назначение выводов: 1 — усилитель ошибки; 2-датчик тока; 3-компаратор недонапряжения; 4 — общий; 5-выход драйвера; 6-напряжение питания; 7-главный пуск; 8 — компаратор перехода через нуль.
[14]
Страницы:
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Усилители звука нужны для того, чтобы улучшить качество воспроизведения музыки путем уменьшения ее искажения при включении большой громкости. Иногда автовладельцы сталкиваются с ошибками усилителя на магнитоле Пионер: в колонках пропадает звук, а потом техника опять начинает работать, при этом на дисплее светится надпись «ERROR DC». Есть несколько способов устранения неполадок, выбрать правильный можно, определив причину неисправности.
Как и почему выдается ошибка
Усилитель — микросхема с несколькими маленькими металлическими штырями. Он может не работать при неправильном подключении или при повреждении составляющих частей прибора или проводки. Если эта деталь повреждена, то необходимо заменить усилку.
Если ошибка усилителя выявлена до его использования, значит, микросхема была подключена неправильно. Возможно, что вы использовали провода не того диаметра или подключили их не к тем входам.
Автомагнитола пишет «ERROR DC» и при коротком замыкании. Проверьте соединения на магнитоле и провода, которые используются для подключения колонок.
Возможно 1 из проводов перебит чем-то и поэтому производит короткое замыкание.
Можете сделать это самостоятельно, но диагностика в автосервисе на профессиональном оборудовании позволит точнее выявить причину проблемы.
Когда проводка не повреждена, а ошибка усилителя звука магнитолы Pioneer высвечивается на дисплее, скорее всего в приборе сгорел предохранитель.
Поломка может быть вызвана резким повышением громкости музыки на недорогих устройствах, выпущенных китайскими фирмами.
Производители подделок используют дешевые микросхемы низкого качества, которые менее устойчивы к изменениям настроек. Владельцы оригинальных автомагнитол с подобными неполадками в работе приборов сталкиваются редко.
Что делать
В случае обнаружения ошибки при подключении усилителя еще раз прочитайте инструкцию к нему и проверьте, все ли вы правильно подсоединили. Если Вам не удалось найти неточности, обратитесь в автомастерскую.
Когда вышеописанная проблема была выявлена в ходе эксплуатации устройства, выполните следующие действия:
- измерьте напряжение на выходе усилителя с помощью вольтметра;
- выполните подключение колонок к магнитоле, не используя усилитель;
- проверьте подключение проводки на магнитоле и колонках, чтобы выявить плохой контакт;
- посмотрите состояние предохранителей.
Часто к возникновению надписи «ERROR DC» приводят скрутки проводов или их повреждение. При обнаружении 1 проблемы надо установить жесткое соединение. Для этого можно использовать колодку с болтовыми зажимами. Во 2 случае — заменить поврежденную проводку.
Если эти действия не помогли от проблемы и ошибка усилителя не исчезла, ремонт микросхемы лучше доверить специалистам. В мастерской установят точную причину, по которой появилась неисправность, а также починят автомагнитолу.
Можно устранить самостоятельно ошибку в работе усилителя, но для этого надо разбираться в том, что представляет собой данная часть магнитолы и знать, какие функции выполняют ее составные части. Автомагнитола станет работать исправно, если отрубить первый штырь.
Помните о том, что ваши действия могут привести к поломке микросхемы, предназначенной для усиления звука. Если вы не разбираетесь в устройстве и способах подключения детали к автомагнитоле Пионер, посоветуйтесь с профессионалами.
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- Как подключить сабвуфер к 4 канальному усилителю