Error asm operand has impossible constraints

Ругается на асм-вставку

Ругается и не собирается:

main.c:44: ошибка: can’t find a register in class ‘CREG’ while reloading ‘asm’ main.c:44: ошибка: ‘asm’ operand has impossible constraints

Как лечить? Хочу заполнить массив нужным интом. Для теста взял статичный, потом будет по указателю на char *.

Похоже, что здесь не нужны ограничения (наверное, первый раз читаю о них, поэтому не уверен). Тут предположили несовместимые изменения, а во втором комментарии указания на повтор выходных регистров. Комментарий похож на правду, так как если вписать, например, «%ebx» , то компилируется. Но подходящей цитаты из документации с целью подтверждения найти не удалось.

Закомментил регистры. Работает, копирует, не падает. Спасибо.

Но подходящей цитаты из документации с целью подтверждения найти не удалось.

You may not write a clobber description in a way that overlaps with an input or output operand. … There is no way for you to specify that an input operand is modified without also specifying it as an output operand.

Так что если нужно указать, что будут изменены значения регистров используемых под входные операнды — надо их дублировать в списке выходных операндов, а не в списке изменённых

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Arduino IDE compile error with new ESP8266 core 3.0.0 #44

/arduino/libraries/Brzo_I2C/brzo_i2c.c: In function ‘brzo_i2c_write’:
/arduino/libraries/Brzo_I2C/brzo_i2c.c:72:2: error: cannot find a register in class ‘RL_REGS’ while reloading ‘asm’
72 | asm volatile (
| ^

/arduino/libraries/Brzo_I2C/brzo_i2c.c:72:2: error: ‘asm’ operand has impossible constraints
exit status 1
Fehler beim Kompilieren für das Board Generic ESP8266 Module.

Can this be easy fixed? Thanks.
I’m using latest brzo version.

The text was updated successfully, but these errors were encountered:

I can confirm the same for anything using brzo_i2c with v3.0.0. I have used all previous versions of the ESP8266 core (2.7.4 through 2.3.0) and they all work fine with v1.3.3 of the Brzo library. The new v3.0.0 core generates the same error as shown above.

Probably related to #40.

Well, I am not an expert on GCC. I don’t know what they exactly changed in the tool chain, like compiler switches or so. I am using many registers, so the compiler basically says «no more registers». But why suddenly they run out of registers, I really don’t know.

Maybe better to ask at arduino core

I am not an real assembler guy but I can read with datasheet next to code.
Here’s a patch that could be tested. You need to know that I did not test it, so I don’t know if it still works and neither the impact on performances.
I reduced the requested register size (where I could understand that it is safe but @pasko-zh may advise) and with these changes gcc-10.2-xtensa is fine.

edit: Maybe this is a non-sense because one cannot use a non-32bit variable to be mapped to a register. gcc not complaining made me confident.

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libavcodec cannot be built if configured with «—disable-optimizations»

Описание

In file included from libavcodec/cabac.h:60,

libavcodec/x86/cabac.h: In function ‘get_cabac_bypass_sign_x86’:
libavcodec/x86/cabac.h:107: error: can’t find a register in class ‘GENERAL_REGS’ while reloading ‘asm’
libavcodec/x86/cabac.h:107: error: ‘asm’ operand has impossible constraints
make: * [libavcodec/cabac.o] Error 1

Вложения (3)

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История изменений (13)

by Andrew , 11 лет ago

by Andrew , 11 лет ago

by Andrew , 11 лет ago

comment:1 by Andrew , 11 лет ago

sorry,
1) ./version.sh
N-35739-ga6c4c0f
2) This error has appeared not later the beginning of December.

Only reproducible for ia32, regression since 599b4c6e.

reverting 599b4c6e just causes the next file to fail:
libpostproc/postprocess_template.c: In function ‘dering_MMX2’:
libpostproc/postprocess_template.c:1045:5: error: can’t find a register in class ‘GENERAL_REGS’ while reloading ‘asm’
libpostproc/postprocess_template.c:1045:5: error: ‘asm’ operand has impossible constraints

Not reproducible anymore.

I was just able to reproduce it with

./configure —enable-memalign-hack —arch=x86 —enable-gpl —enable-libx264 —enable-avisynth —enable-libxvid —target-os=mingw32 —cross-prefix=/home/rogerdpack/dev/ffmpeg-windows-build-helpers/builds/mingw-w64-i686/bin/i686-w64-mingw32- —pkg-config=pkg-config —enable-libmp3lame —enable-version3 —enable-libvo-aacenc —enable-libvpx —extra-libs=-lws2_32 —extra-libs=-lpthread —enable-zlib —extra-libs=-lwinmm —extra-libs=-lgdi32 —enable-librtmp —enable-libvorbis —enable-libtheora —enable-libspeex —enable-libopenjpeg —enable-gnutls —enable-libgsm —enable-libfreetype —disable-optimizations —enable-runtime-cpudetect

I think the work around is to also use —disable-mmx if you use —disable-optimizations. Is this expected?

Feel free to re-close it if I’m wrong though, and I will research a bit more into it 🙂

Please do not reopen ancient tickets, I suspect you have found ticket #1695, patches exist.

Ok I hope #1695 fixes it (and may be related, though I’ll admit that the error message I got was that described in this ticket). Real work around for now: configure with —disable-postproc.

Ok I hope #1695 fixes it (and may be related, though I’ll admit that the error message I got was that described in this ticket). Real work around for now: configure with —disable-postproc.

—disable-postproc helped with an error compiling cabac.c, are you sure?

(—disable-postproc helped it avoid the other error he mentioned «error: can’t find a register in class ‘GENERAL_REGS’ while reloading ‘asm’») FWIW. I haven’t run into this for quite awhile and so appreciate the fix.

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Compilation error with 4.14 kernel: «impossible constraint in asm» #50

Trying to compile the latest isgx module from the master branch:

I see this error on both Fedora 27 and Arch Linux.

The text was updated successfully, but these errors were encountered:

This seems to be a recurrence of #13, and even has the same workaround.

So I understand that the only difference is the addition of M=$(PWD) instead of SUBDIRS=$(PWD) in the original Makefile.
Can we close it?

I have been working around this problem by removing the -O0 option from CFLAGS_MODULE in the Makefile . I would consider closing it without an attempt at understanding it to be premature.

I ran into similiar problems when compiling kernel 4.14 by changing -O2 to -O0.

`In file included from ./include/linux/compiler_types.h:58:0,
from ./include/linux/compiler.h:5,
from ./arch/x86/include/asm/atomic.h:5,
from ./include/linux/atomic.h:5,
from ./include/linux/crypto.h:20,
from arch/x86/kernel/asm-offsets.c:9:
./arch/x86/include/asm/cpufeature.h: In function ‘_static_cpu_has’:
./include/linux/compiler-gcc.h:270:38: warning: asm operand 0 probably doesn’t match constraints
#define asm_volatile_goto(x. ) do < asm goto(x); asm («»); >while (0)
^
./arch/x86/include/asm/cpufeature.h:148:3: note: in expansion of macro ‘asm_volatile_goto’
asm_volatile_goto(«1: jmp 6fn»
^
./include/linux/compiler-gcc.h:270:38: warning: asm operand 2 probably doesn’t match constraints
#define asm_volatile_goto(x. ) do < asm goto(x); asm («»); >while (0)
^
./arch/x86/include/asm/cpufeature.h:148:3: note: in expansion of macro ‘asm_volatile_goto’
asm_volatile_goto(«1: jmp 6fn»

./include/linux/compiler-gcc.h:270:38: error: impossible constraint in ‘asm’
#define asm_volatile_goto(x. ) do < asm goto(x); asm («»); >while (0)
^
./arch/x86/include/asm/cpufeature.h:148:3: note: in expansion of macro ‘asm_volatile_goto’
asm_volatile_goto(«1: jmp 6fn»
^`

The trouble above was caused by extended assembly in arch/x86/include/asm/cpufeature.h, where the modifiers of the operand 0 and 2 were i, meaning that immediate integers were expected. But they both used parameter bit, which was a variable instead of a constant. If -O2 was specified, the inline function _static_cpu_has was expanded with a constant in place of parameter bit, which bypassed the restriction.

static __always_inline __pure bool _static_cpu_has(u16 bit) < asm_volatile_goto(«1: jmp 6fn» «2:n» «.skip -(((5f-4f) — (2b-1b)) >0) * » «((5f-4f) — (2b-1b)),0x90n» «3:n» «.section .altinstructions,»a»n» » .long 1b — .n» /* src offset */ » .long 4f — .n» /* repl offset */ » .word %P1n» /* always replace */ » .byte 3b — 1bn» /* src len */ » .byte 5f — 4fn» /* repl len */ » .byte 3b — 2bn» /* pad len */ «.previousn» «.section .altinstr_replacement,»ax»n» «4: jmp %l[t_no]n» «5:n» «.previousn» «.section .altinstructions,»a»n» » .long 1b — .n» /* src offset */ » .long 0n» /* no replacement */ » .word %P0n» /* feature bit */ » .byte 3b — 1bn» /* src len */ » .byte 0n» /* repl len */ » .byte 0n» /* pad len */ «.previousn» «.section .altinstr_aux,»ax»n» «6:n» » testb %[bitnum],%[cap_byte]n» » jnz %l[t_yes]n» » jmp %l[t_no]n» «.previousn» : : **»i» (bit)**, «i» (X86_FEATURE_ALWAYS), **[bitnum] «i» (1 > 3]) : : t_yes, t_no); t_yes: return true; t_no: return false; >

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Когда я внедрил сборку на языке C, я столкнулся со следующей ошибкой при компиляции этого кода с помощью команды оболочки в Ubuntu Linux 14.04.

    IFR_temp_measure.cpp: In function ‘void BlockTempClc(char*, char*, 
     int, int, char, int, int, int, int*, int, int*, int)’:
     IFR_temp_measure.cpp:1843:6: error: ‘asm’ operand has impossible 
    constraints);
    ^
    &make: *** [IFR_temp_measure.o] Error 1

Или позиция строки кода ошибки 1842，1843 отвечает на код

    :"cc", "memory","q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8", "q10", "q11", "q12", "q13", "q14", "q15","r0", "r1", "r3", "r4", "r5","r6","r8", "r9", "r10", "r12"
            );

Я пытался решить эту проблему, но в Интернете доступно несколько ссылок, есть компоновщик:
Встроенная сборка Gcc, что означает «операнд asm имеет невозможные ограничения»? и http://www.ethernut.de/en/documents/arm-inline-asm.html
но не помогло.
Мой код выглядит следующим образом:

    void BlockTempClc(char* src1,char* src2,int StrideDist,int height,char temp_comp1,int numofiterations,int temp_comp2,int temp_comp3,int *dstData,int width,int *dstSum,int step)
{

            volatile char array1[16] = {0,0,0,0,0,0,0,0,
                                       0,0,0,0,0,0,0,0};
            volatile char array2[16] = {0,0,1,0,2,0,3,0,
                                       4,0,5,0,6,0,7,0};
            asm volatile(   
            "mov        r0, %0; " //image[0]    
            "mov        r1, %1; "  //image[1] 
            "mov        r12,%11; " //m
            "mov        r3, %4; " //n
            "mov        r4, %2; " //store data
            "mov        r8, %12; " //step down for loading next line of image
            "mov        r5, %6; " //numofiterations
            "mov        r6, %3; " //out

            "mov.8 r9,%5;"//isp_temp_comp
            "mov.8 r10,%7;"//led_temp_comp
            "mov.8 r11,%8;"//fac_temp_comp


            "vdup.8 d20,r9;"//copy arm register value isp_temp_comp to neon  register
            "VMOV.S16 q9, d20; " //isp_temp_comp transfer to signed short type

            "VLD1.8     {d16,d17}, [%9];"//q8  array1 sum
            "VLD1.8     {d6,d7}, [%10];"//q3  array2

            "VMOV.S16   q0, #256; "
            "VMOV.S16   q1, #2730; " //Assign immediate number 2730 to each 16 bits of d1       

            ".loop:;"           

            "vdup.8 d21,r10;"//copy arm register value led_temp_comp to neon  register 
            "vdup.8 d22,r11;"//copy arm register value fac_temp_comp to neon  register 

            "VLD1.8    d14, [r1],r8; "    // q7  *(image[1] + tmp + n)  Load: Load Picture Pixels   r6:move step  ?
            "VLD1.8    d15, [r0],r8 "    // *(image[0] + tmp + n)  Load: Load Picture Pixels            

            "PLD        [r1]; " //Preload: one line in cache
            "PLD        [r0]; "  //?

            "VMOV.S16  q5, d14; " //q5    8*16  transfer to signed short type:*(image[1] + tmp + n) 
            "VMOV.S16  q6, d15; " //q6    8*16  transfer to signed short type : *(image[0] + tmp + n) 

            "VADD.S16  q12,q6, q9;"//*(image[0] + tmp + n) + isp_temp_comp              
            "VMOV.S16  q6, d21; " //led_temp_comp
            "VADD.S16  q13,q12, q6;"//*(image[0] + tmp + n) + isp_temp_comp+ + led_temp_comp
            "VMOV.S16  q6, d22; " //fac_temp_comp
            "VADD.S16  q14,q13, q6;"//*(image[0] + tmp + n) + isp_temp_comp+ + led_temp_comp+ fac_temp_comp
            "VSUB.S16  q15,q14, q1;"//*(image[0] + tmp + n) + isp_temp_comp+ + led_temp_comp+ fac_temp_comp-2730
            "VMLA.S16   q15, q5, q0;"//img_temp[m][n]=*(image[0] + tmp + n) + isp_temp_comp+ + led_temp_comp+ fac_temp_comp-2730+*(image[1] + tmp + n) *256 


            "VADD.S16  q2,q15, q8;"//sum                
            "VMOV.S16    q8, q2; " //q8


            "vdup.8 d20,r3;"//n 
            "vdup.8 d21,r12;"//m

            "VMOV.S16  q11, d20; " //n
            "VMOV.S16  q10, d21; " //m

            "VADD.S16  q4,q3, q11;"//(n,n+1,n+2,n+3,n+4,n+5,n+6,n+7)
            "VADD.S16  q7,q3, q10;"//(m,m+1,m+2,m+3,m+4,m+5,m+6,m+7)  q7


            "VST1.16     {d30[0]}, [r4]!; "//restore img_temp[m][n] to pointer data
            "VST1.16     {d14[0]}, [r4]!; "//restore m
            "VST1.16     {d8[0]}, [r4]!; "  //restore n

            "VST1.16     {d30[1]}, [r4]!; "     
            "VST1.16     {d14[1]}, [r4]!; "
            "VST1.16     {d8[1]}, [r4]!; "

            "VST1.16     {d30[2]}, [r4]!; "     
            "VST1.16     {d14[2]}, [r4]!; "
            "VST1.16     {d8[2]}, [r4]!; "

            "VST1.16     {d30[3]}, [r4]!; "     
            "VST1.16     {d14[3]}, [r4]!; "
            "VST1.16     {d8[3]}, [r4]!; "//response to array

            "subs        r5, r5, #1; "   // decrement: numofinteration -= 1;
            "bne        .loop; "        // Branch If Not Zero; to .loop
            "VST1.16     {d4[0]}, [r6]!; "//q2 refer to sum restore the final result to pointer out
            "VST1.16     {d4[1]}, [r6]!; "
            "VST1.16     {d4[2]}, [r6]!; "
            "VST1.16     {d4[3]}, [r6]!; "
            "VST1.16     {d5[0]}, [r6]!; "
            "VST1.16     {d5[1]}, [r6]!; "
            "VST1.16     {d5[2]}, [r6]!; "
            "VST1.16     {d5[3]}, [r6]!; "

            :"+r"(src1),"+r"(src2),"+r"(dstData),"+r"(dstSum),"+r"(height)
            :"r"(temp_comp1),"r"(numofiterations),"r"(temp_comp2),"r"(temp_comp3),
                "r"(array1),"r"(array2), "r"(width),"r"(step)
            :"cc", "memory","q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8", "q10", "q11", "q12", "q13", "q14", "q15","r0", "r1", "r3", "r4", "r5","r6","r8", "r9", "r10", "r12"
            );
}

Я предполагаю, что проблема может заключаться в выходных списках операндов или в выходных списках операндов.
В чем причина ошибки моего кода? И как ее решить?