В. Сидорович очень тихо разговаривает.
О. Это не баг. Теперь Сидорович именно разговаривает, а не звучит телепатически в голове. Выключите радио.
В. Оружейник в ДН не хочет модернизировать оружие.
О. Модернизирует, если ткнуть в него этим стволом. Также имеет значение слот, в котором находится ствол. Для Вепря — слот 1, для автомата слот 2.
Если при запуске происходит вылет [error]Description : illegal instruction не доходя до главного меню, проблему можете решить проверив, не запущена у вас ли утилита MSI Afterburner с RivaTunerStatisticServer (вероятная причина — несовместимость оверлея RTSS).
Выключив MSI + RTSS игра запустилась — как положено через шорткут ОГСР конфигуратора.
Если при запуске игра ругается на отсутствие D3DCOMPILER_47.dll даже при том, что весь доп. софт к моду (OGSRlib) установлен — необходимо обновление для Windows KB4019990 из каталога на оф.сайте Микрософта.
Случайные и неповторяемые вылеты в разных частях локаций, если при этом в логе вылета фигурирует d3d11.dll — скорее всего проблема с видеодрайверами. Переключайтесь на DX9 — «Улучшенное полное освещение» или слабее.
Нередко помогает удаление обновления Windows KB2670838.
ГГ слишком много ест. В файле actor.ltx правьте параметр satiety_v = 0.000005
Долгий запуск игры — запускать не с конфигуратора, а через xrEngine.exe в папке bin_x64.
⚒ Справочник вылетов |
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Это кусок пересборки пакета unzip, а вовсе не какой-то моей программы.
Оптимизация компилера включена:
# x86_64-pc-linux-gnu-gcc -c -O1 -march=native -pipe -std=gnu89 -DNO_LCHMOD -DUSE_BZIP2 -DUNICODE_SUPPORT -DUNICODE_WCHAR -DUTF8_MAYBE_NATIVE -DUSE_ICONV_MAPPING -DLARGE_FILE_SUPPORT -Wall -I. -Ibzip2 -DUNIX -DNO_SETLOCALE crypt.c
during GIMPLE pass: profile_estimate
crypt.c: In function ‘testkey’:
crypt.c:654:1: internal compiler error: Illegal instruction
Оптимизация компилера выключена:
# x86_64-pc-linux-gnu-gcc -c -O0 -march=native -pipe -std=gnu89 -DNO_LCHMOD -DUSE_BZIP2 -DUNICODE_SUPPORT -DUNICODE_WCHAR -DUTF8_MAYBE_NATIVE -DUSE_ICONV_MAPPING -DLARGE_FILE_SUPPORT -Wall -I. -Ibzip2 -DUNIX -DNO_SETLOCALE crypt.c
Немножко предыстории вопроса.
Система установлена на VDS и собрана с оптимизацией под хостовый процессор Xeon Silver. Потом перенесена через dump/restore на другой хост, где Xeon попроще. Часть системы переустановлена из пакетов (потому что запуск чего угодно дает Illegal instruction).
Вопрос собственно в том — что такого вызывает gcc при оптимизации, чего я не пересобрал? world пересобрирал, часть заработала, но не все, как видно.
Recently I have been re-organizing and re-compiling all third-party dependencies of NebulaGraph, an open-source distributed graph database. And I have come across two interesting issues and would like to share with you.
Flex Segmentation Fault——Segmentation fault (core dumped)
Segmentation fault happened upon compiling Flex:
make[2]: Entering directory '/home/dutor/flex-2.6.4/src'
./stage1flex -o stage1scan.c ./scan.l
make[2]: *** [Makefile:1696: stage1scan.c] Segmentation fault (core dumped)
Check coredump with gdb:
Core was generated by `./stage1flex -o stage1scan.c ./scan.l'.
Program terminated with signal SIGSEGV, Segmentation fault.
#0 flexinit (argc=4, argv=0x7ffd25bea718) at main.c:976
976 action_array[0] = '';
(gdb) disas
Dump of assembler code for function flexinit:
0x0000556c1b1ae040 <+0>: push %r15
0x0000556c1b1ae042 <+2>: lea 0x140fd(%rip),%rax # 0x556c1b1c2146
...
0x0000556c1b1ae20f <+463>: callq 0x556c1b1af460 <allocate_array> # Allocate buffer
...
=> 0x0000556c1b1ae24f <+527>: movb $0x0,(%rax) # Write to buffer[0], failed due to illegal address
...
(gdb) disas allocate_array
Dump of assembler code for function allocate_array:
0x0000556c1b1af460 <+0>: sub $0x8,%rsp
0x0000556c1b1af464 <+4>: mov %rsi,%rdx
0x0000556c1b1af467 <+7>: xor %eax,%eax
0x0000556c1b1af469 <+9>: movslq %edi,%rsi
0x0000556c1b1af46c <+12>: xor %edi,%edi
0x0000556c1b1af46e <+14>: callq 0x556c1b19a100 <reallocarray@plt> # Allocate buffer
0x0000556c1b1af473 <+19>: test %eax,%eax # Check if the result pointer is NULL
0x0000556c1b1af475 <+21>: je 0x556c1b1af47e <allocate_array+30># Jump to error handler if NULL
0x0000556c1b1af477 <+23>: cltq # Extend eax to rax, truncated
0x0000556c1b1af479 <+25>: add $0x8,%rsp
0x0000556c1b1af47d <+29>: retq
...
End of assembler dump.
We can see from the assembly code above that the issue was caused by the allocate_array
function. reallocarray
returned a pointer, which should be saved in the 64-bit register rax
. However, allocate_array
called reallocarray
and returned the 32-bit register eax
. Meanwhile it used instruction cltq
to extend eax
to rax
.
The possible reason could be that the prototype of reallocarray
that allocate_array
saw was different than the real prototype.
When looking at the compiling log, I did find such a warning, like _implicit declaration of function_ _reallocarray'_
.
This issue can be resolved by adding CFLAGS=-D_GNU_SOURCE
at the configure stage.
Please note that this issue is not supposed to appear every time. However, enabling compiling/link option -pie
and core parameter kernel.randomize_va_space
helps produce the issue.
Takeaways:
- The return type of an implicit declarative function is
int
in C - Pay attention to compiler warnings with
-Wall
and-Wextra
enabled. Better enable-Werror
under development mode.
GCC Illegal Instruction——internal compiler error: Illegal instruction
A while ago I have received feedback from NebulaGraph users that they encountered a compiler error: illegal instruction. See the details in this pull request: https://github.com/vesoft-inc/nebula/issues/978.
Below is the error message:
Scanning dependencies of target base_obj_gch
[ 0%] Generating Base.h.gch
In file included from /opt/nebula/gcc/include/c++/8.2.0/chrono:40,
from /opt/nebula/gcc/include/c++/8.2.0/thread:38,
from /home/zkzy/nebula/nebula/src/common/base/Base.h:15:
/opt/nebula/gcc/include/c++/8.2.0/limits:1599:7: internal compiler error: Illegal instruction
min() _GLIBCXX_USE_NOEXCEPT { return FLT_MIN; }
^~~
0xb48c5f crash_signal
../.././gcc/toplev.c:325
Please submit a full bug report,
with preprocessed source if appropriate.
Since it’s an _internal compiler error_, my assumption would be that an illegal instruction was encountered in g++ itself. To locate the specific illegal instruction set and the component it belongs to, we need to reproduce the error.
Luckily, the code snippet below can do the magic:
#include <thread>
int main()
{
return 0;
}
Illegal instruction is sure to trigger SIGIL. Since g++ acts only as the entrance of the compiler, the real compiler is cc1plus.
We can use gdb to perform the compiling process and catch the illegal instruction on spot:
$ gdb --args /opt/nebula/gcc/bin/g++ test.cpp
gdb> set follow-fork-mode child
gdb> run
Starting program: /opt/nebula/gcc/bin/g++ test.cpp
[New process 31172]
process 31172 is executing new program: /opt/nebula/gcc/libexec/gcc/x86_64-pc-linux-gnu/8.2.0/cc1plus
Thread 2.1 "cc1plus" received signal SIGILL, Illegal instruction.
[Switching to process 31172]
0x00000000013aa0fb in __gmpn_mul_1 ()
gdb> disas
...
0x00000000013aa086 <+38>: mulx (%rsi),%r10,%r8
...
Bingo!
mulx
belongs to BMI2 instruction set and the CPU of the machine in error doesn’t support this instruction set.
After a thorough investigation, I found that it was GMP, which is one of GCC’s dependencies, that introduced this instruction set. By default, GMP would detect the CPU type of the host machine at the configure stage to make use of the most recent instruction sets, which improves performance while sacrificing the portability of the binary.
To solve the issue, you can try to override two files in the GMP source tree, i.e. _config.guess_ and _config.sub_ with _configfsf.guess_ and _configfsf.sub_ respectively before configure
.
Conclusion
- GCC won’t adopt new instruction set due to compatibility issue by default.
- To balance compatibility and performance, you need to do some extra work. For example, select and bind a specific instance for gllibc when it is running.
Finally, if you are interested in compiling the source code of NebulaGraph, please refer to the instructions here
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Article ID: 000057876
Content Type: Error Messages
Last Reviewed: 02/09/2023
Error: “Illegal Instruction” when Running the OpenVINO™ Post-training Optimization Toolkit (POT) on Intel Atom® Platforms
Environment
Platform with Intel Atom® Processors N4200 or E3850Ubuntu* 18.04 LTSOpenVINO™ toolkit 2020.4
Options to resolve «Illegal Instruction» error when running the OpenVINO™ Post-training Optimization Toolkit (POT) on Intel Atom® platform
Unable to use the POT to optimize a Tensorflow (TF) or MXNet model for inference with the OpenVINO™ toolkit on an Intel Atom® platform.
- Run pot -h.
- Receive error message: Illegal Instruction exception
Choose one of two options:
- In most cases, TensorFlow (TF) or MXNet is not needed for POT. Use virtualenv for a clean python environment:
$ python3 -m pip install virtualenv
$ python3 -m virtualenv -p `which python3` <directory_for_environment>
- If using POT or AccuracyChecker when evaluating a model that uses TF or MXNet as the backend, use the non-AVX version of TF/MXNet. For example, use the conda distribution or compile them from source.
Refer to following links to build from source:
- TensorFlow Intel Atom Github
- MXNet Get Started Build from Source
Similarly to MXNet, TensorFlow (TF) from pypi is shipped with AVX starting from version 1.6. Intel Atom® E3950 Processor supports SSE instructions and does not support AVX. Therefore, importing TF or MXNet models will cause an illegal instruction error when POT is run in devices without AVX support.
POT itself does not directly depend on either TF or MXNet. POT depends on Model Optimizer and Accuracy Checker, which may depend on TF or MXNet. To minimize this situation, OpenVINO™ toolkit 2021.1 limits the import of TensorFlow to cases where this library is really used, such as when evaluating a model using TF as backend. MXNet is also troublesome for the same scenario, so it is possible to do the same for it.
However, SSE systems, like Intel Atom® platforms, are not used for calibration purposes. It is not recommended to use Intel Atom® platforms for POT quantization.
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