Error invalid license environment application closing

Hi,

Do you have license for Modelsim — Intel FPGA Edition ?

If no, use ModelSim-Altera Starter Edition.

If yes check your license validity & environment variable.

Let me know if you need any further assistance.

Regards

Anand

I don’t think so. I installed the Quartus Prime Lite v18. I assumed I wouldn’t need any licenses because it’s a free version. I just ran the instalation by clicking the QuartusLiteSetup-18.1.0.625-windows.exe.

How do I use ModelSim-Altera Starter Edition? This option doesn’t appear in Assignments > Settings > EDA tool settings > simulation.

When you install Quartus, you have the option of installing the Starter edition or the regular edition. If you accidentally installed the regular edition, you would get this license issue. If you have the modelsim_ase directory as mentioned, then you installed the correct version and should check the environment variables.

Hello, I had exactly the same error when trying to simulate the asynchronous counter in this video: https://www.youtube.com/watch?v=kRXWk2llxVk (minute 11:57)
Seeing several comments about it, it occurred to me to go to this path C:intelFPGA_lite17.0
There, I found 2 files: modelsim_ase and modelsim_ae
What I did was delete the "modelsim_ae", then I closed the vwf simulation, I recompiled my schematic, I opened the VWF University Program, I put the entries with their values ​​and I managed to simulate it well (the time diagram appeared).
Let's see if that works for you...

This is a little annoying bug that I discovered after trying to recover the legacy colors of Logisim K-maps in Logisim-EVO changing color preferences. After color check in simulation preference window, I realized that K-maps start with Map color 2 rather than number 1 (this one is really omitted).

When i reset the ram, it outputs X before the first clock, how can i disable this? its very annoying

The proper name for Chinese is «中文», but in preferences it is always shown as «cn».

The root cause may be the wrong use of this language code.

Chinese (Simplified) should be «chs» (language code) instead of «cn» (country code).

Not sure about this, should check the docs I guess.

The «Restart VHDL simulator» command does not seem to be effective in the case errors are encountered in the vhdl code after a «VHDL Simulator Enabled». In this case to restart the simulation, Logisim must be closed and reopened. is this a bug?

I had an error for the last week and had no idea where it came from. Reinstalling completely logisim and modelsim did not helped.

I looked into it and found that in the temp path used (AppdataLocalTemp), there was an empty «work» folder. So modelsim thinks the library exists, reads what’s into it but found nothing, so returns an error.

I think the program could look into the folder and check if the required library files are present, or delete the whole folder.

This issue appears only when «Use Questa Advanced Simulator to validate HDL entities» is enabled.

I’m not sure about if it was a system configuration problem on my computer. Most of my computers runs Archlinux with Java 18. It seems the pin text of RAM is too large and overlaps each other:

While I didn’t found a way to configure font of the canvas in menus. I found that a modification in InstancePainter work:

  public InstancePainter(ComponentDrawContext context, InstanceComponent instance) {
    this.context = context;
    this.comp = instance;
    this.context.getGraphics().setFont(new Font("monospaced", Font.PLAIN, 12)); // added this line
  }

Is there a way to configure the font settings in a graphical way?

This is similar to #1442, but is on Windows so I figured it might be best to open a separate issue.

I installed Quartus and obtained a free license for Questa. I set the LM_LICENSE_FILE environment variable in Windows to point to the license file, and confirmed that I can launch Questa (both by clicking on it in the start menu, and by running vsim in a command line).

Environment Variable Screenshot

I also confirmed that I can access the environment variable from the terminal in both PowerShell and Command Prompt:

PowerShell:

PS C:UsersGabe Roper> $env:LM_LICENSE_FILE
C:intelFPGA_litequesta_license.dat

Command Prompt:

C:UsersGabe Roper> echo %LM_LICENSE_FILE%
C:intelFPGA_litequesta_license.dat

However, when I set up a VHDL entity in Logisim and enable VHDL simulation, I get the following message both as a pop-up and in the VHDL simulation log:

Unable to checkout a license. Make sure your license file environment variable (e.g., LM_LICENSE_FILE)
is set correctly and then run 'lmutil lmdiag' to diagnose the problem.
Unable to checkout a license.  Vsim is closing.
** Error: Invalid license environment. Application closing.

I have tried setting the environment variable both in both the «User Environment Variables» section and the «System Environment Variables» section, but I get the same result either way.

System Information

• Windows 11 21H2
• Logisim-Evolution 3.7.2 (installed using MSI installer)
• Questa — Intel FPGA Starter Edition 21.1.1.850 (Free License version that can be obtained from Intel)

[…] since the increase to 64-bit wide busses, using drop-down lists to choose the bit width and selecting bits is tedious, […]

By @maehne in #617 (comment)

I found these outdated references to Logisim-evolution.

• sourceforge download old version
• Wikipedia FR old version Number, reference to old GitHub URL
• Wikipedia DE old version Number, reference to old GitHub URL
• Wikipedia EN reference to old GitHub URL

The task is to have own, fully controlled Flatpak/Snap packages. There’s currently 3rd party driven, Flatpak package: https://www.flathub.org/apps/details/com.github.reds.LogisimEvolution driven by @TheEvilSkeleton however at the end of the day we should have full control of our packages as this is the only way to keep it up to date with official releases (up to now we rely on 3rd party to have a time to package new version once it is released).

This ticket is kind of followup to #678

@BFH-ktt1 can you please update both organization and repo config to use consistent graphics:

• repo settings -> Options -> Social preview (upload 1280×640 rendition of main logo)
• organization profile icon (use one of hi-res PNGs images from set of in-app icons).

Attached 1280×640 px rendition for repo Social preview -> lse-1280×640.zip

When a circuit is opened or the simulation is reset, all of the circuit’s input pins are reset to low (0). This can cause errors if the pin is intended as an active-low input, as it causes the pin to be initially active.

This is not usually a problem, as most components use active-high inputs, even though their real-life counterparts often use active-low inputs (e.g., the Controlled Buffer component uses an active-high Enable input; all bus buffer IC’s I’ve ever seen use an active-low Enable pin).

I often create custom sub-circuits to replace L-E’s native components, so I can get the polarity of the component’s inputs correct. But that causes problems because any active-low inputs are initialized to 0 (active).

It would be great if L-E had an Initial State attribute for its Input Pin component, that would allow the pin’s state to be set either high (1) or low (0) initially. It’s default would be low (0), making the feature backward compatible.

Thanks.

I’ve set the LM_LICENSE_FILE to the correct file and also been able run vsim manually, however logisim-evultion fails with this message

Unable to checkout a license. Make sure your license file environment variable (e.g., LM_LICENSE_FILE)
is set correctly and then run ‘lmutil lmdiag’ to diagnose the problem.
Unable to checkout a license. Vsim is closing.
** Error: Invalid license environment. Application closing.

I’ve tested this wi/ the current nightly jar file and 3.7.2, both under Ubuntu 20.04 and 22.04.

This ticket is about using var to declare variables and address compiler’s decision to use int (as inferred from code) instead of long as needed -> i.e. var foo = 1; (int) vs var foo = 1L; (long).

This code block was copied from another TTL part.
I will create another PR where I fix this, that and that in multiple files.

Originally posted by @R3dst0ne in #1391 (comment)

74175 has a negative CLR but it is positive on the code:

Fix 74175, CLR is inverted

diff --git a/src/main/java/com/cburch/logisim/std/ttl/Ttl74175.java b/src/main/java/com/cburch/logisim/std/ttl/Ttl74175.java
index 3374a2e71..19c19b535 100644
--- a/src/main/java/com/cburch/logisim/std/ttl/Ttl74175.java
+++ b/src/main/java/com/cburch/logisim/std/ttl/Ttl74175.java
@@ -52,7 +52,7 @@ public class Ttl74175 extends AbstractTtlGate {
       state.setData(data);
     }
     var triggered = data.updateClock(state.getPortValue(7));
-    if (state.getPortValue(0) == Value.TRUE) {
+    if (state.getPortValue(0) == Value.FALSE) {
       data.setValue(Value.createKnown(data.getWidth(), 0));
     } else if (triggered) {
       Value[] vals = data.getValue().getAll();

Real 74×266 ICs have open-collector outputs, which means they aren’t capable of driving their outputs high. This lets you connect the outputs directly together with other OC outputs without causing conflicts, and you need a pull-up resistor to bring the level high.

As implemented in logisim-evolution, however, the 74266 does drive its outputs high, so connecting more than one together will cause errors.

PR #1468 is for fixing this

I am trying to run logisim-evolution with ./gradlew run on archlinux and it loads but gives a blank white screen

7436 ICs differ from 7402 in their pin arrangement, so just extending the 7402 class is incorrect.

Hi. I’ve done a lot of work in Logisim evolution v2.13.8 using the transistor item. In this version the transistor worked perfectly, both N and P-type as shown in photo.

When I upgraded v3.7.2, the transistors no longer function as expected, as shown in photo

Please look into this as it means I’d have to modify all the work I’ve done changing all the transistor types and adding NOT gates.
This means several thousand alterations.
Thank you.

Also, the V3.x.x .jar files wont run on my Windows 10, but the v2 does. (My java run time is up-to-date)

<?xml version="1.0" encoding="utf-8" ?>
<license Owner="CompanyName" Key="aaaa-bbb-ccc-dddd" />

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