Flash boot sdram address bus error

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Hello,

 I am using:
1. custom board based on a pic32mx470f512l,
2. a bit modified uart driver generated by the MCC utility

 A get the following message:
_general _exception_handler: Data bus error; excep_addr 0xe4

 I have a packet parser working on an UART interrupt, here is a code extract showing the final stage of a packet construction:

         queue_message_t message;
         message.uart_id = uart_id;
         memcpy(&message.raw_data[0], &rx_buffer[0], sizeof(full_status_pkt_t));
         circular_buffer_put(cbuf, &message);
#ifdef ENABLE_PRINTF_MAX_Q_ELEMENT
         static size_t max_nb_Q_el = 0;
         size_t cur_nb_Q_el;
         cur_nb_Q_el = cbuf_get_nb_elements(cbuf);
         if (cur_nb_Q_el > max_nb_Q_el)
         {
          max_nb_Q_el = cur_nb_Q_el;
// DLOG("##### %xn", max_nb_Q_el);
         }
#endif
        }



  


                       
  



        *parse_state = PARSE_COMMAND_ID;
        break;
    }

 After the break statement the program goes straight into the UART interruption, here is a code’s extract:

/**
    Maintains the driver's transmitter/receiver/error state machine and implements its ISR
*/
void __ISR(_UART_3_VECTOR, IPL6AUTO) _UART_3(void)
{
    if(IFS1bits.U3RXIF)
    {
        int count = 0;
        while((count < UART3_RX_FIFO_LENGTH) && (U3STAbits.URXDA == 1))
        {
            count++;
            *uart3_obj.rxTail = U3RXREG;
            uart3_obj.rxTail++;
            if(uart3_obj.rxTail == (uart3_rxByteQ + UART3_CONFIG_RX_BYTEQ_LENGTH))
            {
                uart3_obj.rxTail = uart3_rxByteQ;
            }
            uart3_obj.rxStatus.s.empty = false;
            if(uart3_obj.rxTail == uart3_obj.rxHead)
            {
                //Sets the flag RX full
                uart3_obj.rxStatus.s.full = true;
                break;
            }
            uart3_rx_ev_handler(UART3_Read(), 0);
        }
        /*
         * Fails here
         */
        IFS1CLR= 1 << _IFS1_U3RXIF_POSITION;
    }
    else if (IFS2bits.U3TXIF)

 I put a comment before the line after which the program goes into exception. The exception code I’ve seen is 0xe4 or 0x44 depending on my printfs. More interesting, when I enable the define ENABLE_PRINTF_MAX_Q_ELEMENT in the parser, everything is fine, no exception, the program is stable. I tried to replace this define by a delay but couldn’t get the same result…

 Does anybody know how to debug a situation like this?
Thank you.

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Re: How to find the cause of a Data bus error?


2019/02/11 06:32:39

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Found. It’s a buffer overflow issue. The structure full_status_pkt_t has been growing over time and finally became bigger that a circular buffer cell size. Depending on what was after the memcpy function the problem appeared or not.
However, could anyone explain why I got the Data Bus Error exception? I don’t quite understand in which cases a program get here. And what can be found at the addresses like 0xe4?

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Re: How to find the cause of a Data bus error?


2019/02/11 07:03:15

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Bus error encountering when addresses generated beyond physically implemented memory. That is the definition of bus error. May be the buffer was allocated at the edge of memory region and an overflow have accessed an address beyond current allowable region?

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Re: How to find the cause of a Data bus error?


2019/02/11 08:28:14

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On my PC there is an example of writing a general exception handler in

C:Program Files (x86)Microchipxc32v2.15examplesxc32_exampleshandling_exceptions

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Re: How to find the cause of a Data bus error?


2019/02/11 09:27:24

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Your buffer overflow likely wrote over a pointer stored in RAM, making it point to an unmapped memory region. When your program tried dereferencing the pointer, it triggered the exception.

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Re: How to find the cause of a Data bus error?


2020/02/07 22:31:12

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I’m also getting a data bus error with the PIC32MK (using the free xc32).  In my case, I have an interrupt updating at around 5KHz, and it’s modifying a variable like this:

   void __attribute__((interrupt(IPL3SRS), at_vector(_PWM1_VECTOR), aligned(16))) PWM1Interrupt (void) {
 PWMCON1CLR = 0b11111000000000001100000000000000; // clear all of the stupid flags.
 IFS5CLR = _IFS5_PWM1IF_MASK; // this can only be cleared after clearing the PWMCON1 interrupt flags 
pwmCounter++;
 if (pwmCounter > 10000) {
 if (O_PORT_LED == 0) O_LAT_LED = 1;
 else O_LAT_LED = 0;
 pwmCounter = 0;
 }

And in the while(1) loop in main:

   while (1) {
   x = pwmCounter;
   }

If I don’t include the line «x = pwmCounter;», the code runs.  If I add that line, I get a data bus error.  Does anyone have any ideas what is going on?

 If I set optimization to 1, the problem goes away.  My goodness…

post edited by MPaulHolmes — 2020/02/07 23:10:56

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Re: How to find the cause of a Data bus error?


2020/02/08 04:42:00

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That is not enough context to be able to say anything. Can you provide a complete (ie. something that compiles and runs) testcase?

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Re: How to find the cause of a Data bus error?


2020/02/08 08:50:22

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I had to modify it so it wouldn’t be freakishly long, and changed the interrupt to TMR3 interrupt, but I can still get an exception here, so I thought the reasons may be related.  
Optimization level is 0, xc32 compiler, pic32mk0512mcf100 microcontroller.  I just wanted to add that this forum is an amazing resource, and I am very grateful for everyone’s willingness to offer their expertise.

   #pragma config USERID = 0xFFFF // Enter Hexadecimal value (Enter Hexadecimal value)
#pragma config PWMLOCK = OFF // PWM IOxCON lock (PWM IOxCON register writes accesses are not locked or protected)
#pragma config FUSBIDIO2 = 0//OFF // USB2 USBID Selection (USBID pin is controlled by the port function)
#pragma config FVBUSIO2 = 0//OFF // USB2 VBUSON Selection bit (VBUSON pin is controlled by the port function)
#pragma config PGL1WAY = OFF // Permission Group Lock One Way Configuration bit (Allow multiple reconfigurations)
#pragma config PMDL1WAY = OFF // Peripheral Module Disable Configuration (Allow multiple reconfigurations)
#pragma config IOL1WAY = OFF // Peripheral Pin Select Configuration (Allow multiple reconfigurations)
#pragma config FUSBIDIO1 = 0//OFF // USB1 USBID Selection (USBID pin is controlled by the port function)
#pragma config FVBUSIO1 = 0//OFF // USB2 VBUSON Selection bit (VBUSON pin is controlled by the port function)



  


                       
  



   // DEVCFG2
#pragma config FPLLIDIV = DIV_1 // System PLL Input Divider (1x Divider)
#pragma config FPLLRNG = RANGE_8_16_MHZ // System PLL Input Range (8-16 MHz Input)
#pragma config FPLLICLK = PLL_POSC//1==FRC. PLL_POSC // System PLL Input Clock Selection (POSC is input to the System PLL)
#pragma config FPLLMULT = MUL_60 // System PLL Multiplier (PLL Multiply by 60)
#pragma config FPLLODIV = DIV_4 //DIV_4 // System PLL Output Clock Divider (4x Divider)
#pragma config VBATBOREN = OFF // VBAT BOR Enable (Disable ZPBOR during VBAT Mode)
#pragma config DSBOREN = OFF // Deep Sleep BOR Enable (Disable ZPBOR during Deep Sleep Mode)
#pragma config DSWDTPS = DSPS32 // Deep Sleep Watchdog Timer Postscaler (1:2^36)
#pragma config DSWDTOSC = LPRC // Deep Sleep WDT Reference Clock Selection (Select LPRC as DSWDT Reference clock)
#pragma config DSWDTEN = OFF // Deep Sleep Watchdog Timer Enable (Disable DSWDT during Deep Sleep Mode)
#pragma config FDSEN = OFF // Deep Sleep Enable (Disable DSEN bit in DSCON)
#pragma config BORSEL = 0//LOW // Brown-out trip voltage (BOR trip voltage 2.8v (OPAMP deviced operation))
#pragma config UPLLEN = 1//OFF==1 // USB PLL Enable (USB PLL Disabled)
   // DEVCFG1
#pragma config FNOSC = SPLL//FRC//0b101//SPLL//FRC //POSC // Oscillator Selection Bits (Primary Osc (HS,EC))
#pragma config DMTINTV = WIN_127_128 // DMT Count Window Interval (Window/Interval value is 127/128 counter value)
#pragma config FSOSCEN = OFF // Secondary Oscillator Enable (Disable Secondary Oscillator)
#pragma config IESO = OFF // Internal/External Switch Over (Disabled)
#pragma config POSCMOD = HS//0b11//POSC IS DISABLED. HS // Primary Oscillator Configuration (HS osc mode)
#pragma config OSCIOFNC = OFF // CLKO Output Signal Active on the OSCO Pin (Disabled)
#pragma config FCKSM = CSDCMD // Clock Switching and Monitor Selection (Clock Switch Disabled, FSCM Disabled)
#pragma config WDTPS = PS1048576 // Watchdog Timer Postscaler (1:1048576)
#pragma config WDTSPGM = STOP // Watchdog Timer Stop During Flash Programming (WDT stops during Flash programming)
#pragma config WINDIS = NORMAL // Watchdog Timer Window Mode (Watchdog Timer is in non-Window mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable (WDT Disabled)
#pragma config FWDTWINSZ = WINSZ_25 // Watchdog Timer Window Size (Window size is 25%)
#pragma config DMTCNT = DMT31 // Deadman Timer Count Selection (2^31 (2147483648))
#pragma config FDMTEN = OFF // Deadman Timer Enable (Deadman Timer is disabled)
   // DEVCFG0
#pragma config DEBUG = OFF //0 means enable debug // Background Debugger Enable (Debugger is disabled)
#pragma config JTAGEN = OFF // JTAG Enable (JTAG Disabled)
#pragma config ICESEL = ICS_PGx2 // ICE/ICD Comm Channel Select (Communicate on PGEC2/PGED2)
#pragma config TRCEN = OFF // Trace Enable (Trace features in the CPU are disabled)
#pragma config BOOTISA = MIPS32 // Boot ISA Selection (Boot code and Exception code is MIPS32)
#pragma config FSLEEP = OFF // Flash Sleep Mode (Flash is powered down when the device is in Sleep mode)
#pragma config DBGPER = PG_ALL // Debug Mode CPU Access Permission (Allow CPU access to all permission regions)
#pragma config SMCLR = MCLR_NORM // Soft Master Clear Enable (MCLR pin generates a normal system Reset)
#pragma config SOSCGAIN = GAIN_2X // Secondary Oscillator Gain Control bits (2x gain setting)
#pragma config SOSCBOOST = ON // Secondary Oscillator Boost Kick Start Enable bit (Boost the kick start of the oscillator)
#pragma config POSCGAIN = GAIN_LEVEL_3 // GAIN LEVEL 0 TO 3 SEEM TO ALL WORK. GAIN_LEVEL_3 // Primary Oscillator Gain Control bits (Gain Level 3 (highest))
#pragma config POSCBOOST = ON//OFF // If this is off, production programming won't work without the pickit 3 plugged in. Primary Oscillator Boost Kick Start Enable bit (Boost the kick start of the oscillator)
#pragma config EJTAGBEN = NORMAL // EJTAG Boot Enable (Normal EJTAG functionality)
   // DEVCP
#pragma config CP = OFF // Code Protect (Protection Disabled)
   // SEQ
#pragma config TSEQ = 0//0xFFFF // Boot Flash True Sequence Number (Enter Hexadecimal value)
#pragma config CSEQ = 0x0FFFF // Boot Flash Complement Sequence Number (Enter Hexadecimal value)
   #include "p32mk0512mcf100.h"
   volatile unsigned int timer3Counter = 0, whileCounter = 0;
   void __attribute__((interrupt(IPL3SRS), at_vector(_TIMER_3_VECTOR), aligned(16))) Timer3Interrupt (void);
   void Delay_ms(unsigned int _delay);
void InitTimers();
   int main() { 
 __builtin_mtc0(16, 0,(__builtin_mfc0(16, 0) | 0x3));
 CHECONbits.PFMWS = 3; 
 INTCONSET = _INTCON_MVEC_MASK;
//PRISSSET = _PRISS_PRI4SS_MASK; // interrupts with priority 4 use shadow set 1.
 __builtin_enable_interrupts();
 InitTimers();



  


                       
  



   while (1) {
 whileCounter++;
 Delay_ms(2);
 } 
 return 1;
}
void __attribute__((interrupt(IPL3SRS), at_vector(_TIMER_3_VECTOR), aligned(16))) Timer3Interrupt (void) {
 //IFS2bits.T7IF = 0;
 IFS0CLR = _IFS0_T3IF_MASK;
   timer3Counter++;
 if ((timer3Counter & 8191) == 8191) {
 asm("nop;nop;");
 } 
 asm("nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;");
 asm("nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;");
}
void Delay_ms(unsigned int _delay) { // not much more than 65535 for delay. Otherwise we will have 32 bit overflow.
 static unsigned int _startTime = 0;
 static unsigned int _i = 0;
 // _CP0_GET_COUNT() is a 60MHz clock.
 // 1ms is 1/60,000,000 * 60,000.
 _startTime = TMR7;
 _i = 60000*_delay;
 while (TMR7 - _startTime < _i) {} // delay the required number of ms.
}
void InitTimers() {
 T3CONbits.T32 = 1; // 32 bit mode enabled.
 T7CONbits.T32 = 1; // 32 bit mode enabled.
 PR3 = 12000-1; // The interrupt should run at 10khz. 
 T3CONbits.TCKPS = 0b0; // prescaler = 1. So, the timer runs at 60,000,000 Hz. (PB5 clock but with prescaler of 1) 
 T7CONbits.TCKPS = 0b0;
 IPC3bits.T3IP = 3;
 IPC3bits.T3IS = 3;
 IFS0bits.T3IF = 0;
 IEC0bits.T3IE = 1;
 T3CONbits.ON = 1;
 T7CONbits.ON = 1; 
}

post edited by MPaulHolmes — 2020/02/08 10:14:28

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Re: How to find the cause of a Data bus error?


2020/02/08 08:50:23

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double post on accident, so I deleted it.  I don’t know how to remove a post completely.

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Re: How to find the cause of a Data bus error?


2020/02/08 09:59:35

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The initialization of the PRISS register doesn’t match your register set usage.

PRISSSET = _PRISS_PRI4SS_MASK; // interrupts with priority 4 use shadow set 1.
 void __attribute__((interrupt(IPL3SRS), at_vector(_TIMER_3_VECTOR), aligned(16))) Timer3Interrupt (void)

The comment is also not correct, _PRISS_PRI4SS_MASK will set the reserved value 0xF for priority 4. For the PIC32MK, the valid values are 0 and 1.

 As a sidenote, on a device with two register sets, it doesn’t really make sense to allocate the second register set to anything except the highest priority interrupts.

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Re: How to find the cause of a Data bus error?


2020/02/08 10:13:34

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Oh, so it should be:
PRISSET = (1 << 16);

 That was actually a hold-over from the larger program, but if I comment it out, since I’m not using priority 4 level in this mini-code, it still does the exception.  I commented out the prisset line in the code above.  As it is with the commented out prisset, there’s still an exception.  

post edited by MPaulHolmes — 2020/02/08 10:15:51

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Re: How to find the cause of a Data bus error?


2020/02/08 10:31:57

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No, it should be

PRISS = (1U << 12);

If your ISR says it’s using shadow registers at priority 3, then the PRISS setting for priority 3 better match that claim.

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Re: How to find the cause of a Data bus error?


2020/02/08 10:44:37

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I think we had a misunderstanding.  I meant PRISSET = (1 << 16) sets up interrupts with priority 4 to shadow set 1, and the default for everything is shadow set 0, but since I am not using any interrupts with priority 4 in this mini-project, I just commented it out.  The timer interrupt is priority 3.  But the sub-priority is 3.  Does that make it sort of priority 4, since it’s greater than 3 (sort of)? 

 But here’s an interesting thing.  I set interrupts with priority 3 to use shadow set 1, and now there’s no exception, but there IS an exception when I just use the default of shadow set 0.  Does the «IPL3SRS» in:
void __attribute__((interrupt(IPL3SRS), at_vector(_TIMER_3_VECTOR), aligned(16))) Timer3Interrupt (void);

 Mean that I HAVE TO use shadow set 1 for interrupts with priority 3?

post edited by MPaulHolmes — 2020/02/08 10:48:58

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Re: How to find the cause of a Data bus error?


2020/02/08 10:57:41

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Shadow set 0 is what your non-interrupt code is using. When the data sheet says there are «Two 32-bit code register files», that means there are two sets in total, not two additional sets for use by interrupts. So when your ISR is set to IPL3SRS, and IPL3 is configured to use shadow set 0 in PRISS, the interrupt handler will trash the execution context for anything else using the same shadow register set.

 The «SRS» interrupt attribute is a directive to the compiler that it doesn’t have to generate code for saving the general-purpose registers on stack. It does not change the behaviour of the hardware in any way. When an interrupt triggers, the CPU will switch to the register set configured for that interrupt’s priority level in the PRISS register.

 Edit:

MPaulHolmesThe timer interrupt is priority 3.  But the sub-priority is 3.  Does that make it sort of priority 4, since it’s greater than 3 (sort of)?

No. An interrupt with a higher priority (group priority level) can pre-empt one with a lower priority. If two interrupts with the same priority are pending at the same time, the one with the highest sub-priority will be serviced first. As a final tie-breaker, the interrupt number is used, with the lowest number having the highest «natural» priority. See section 8.7 in the family reference manual.

post edited by andersm — 2020/02/08 11:03:54

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Re: How to find the cause of a Data bus error?


2020/02/08 10:59:41

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Mind Grenade!!!!

 I did not realize this!  Thank you sir!

Belyaev Nikolay

Привет всем.

Проблема такая. запуская apache2 и… тут же вылетает ошибка Bus error. Логов не создаётся. Причём программу я удалил (через purge и удалил всё что было в /etc/apache2 ) и просто случайно запустил и опять Bus error. Перед этим была проблема с диском — «слишком много ошибок» и делал проверку вручную 1.3% от всего что находится в / было исправлено  Ошибка похоже не в apache, а в системе в принципе. чего делать? 

« Последнее редактирование: 19 Декабря 2008, 09:44:22 от Belyaev Nikolay »

«Сначала они вас игнорируют, потом смеются над вами, потом борются с вами, а потом вы побеждаете»
Махатма Ганди

digiwhite

А более подробного текста ошибки нету?

Belyaev Nikolay

в том-то и беда
я просто не понимаю почему не удалился полностью apache…

« Последнее редактирование: 18 Декабря 2008, 17:35:29 от Belyaev Nikolay »

«Сначала они вас игнорируют, потом смеются над вами, потом борются с вами, а потом вы побеждаете»
Махатма Ганди

digiwhite

Так, а что вы случайно запустили снова после удаления apache?

Belyaev Nikolay

apache2
причём от пользователя…
и тутже получил ошибку Bus Error

«Сначала они вас игнорируют, потом смеются над вами, потом борются с вами, а потом вы побеждаете»
Махатма Ганди

axe

Bus error — это какая-то глобальная ошибка? Software или hardware? Линукс жив остается? каким образом она «возникает»?

Belyaev Nikolay

пока заметил её только при работе с apache. в логах (смотрю файлы на изменение в /var/log) НИГДЕ ничего не добавляется. пробовал запускать апач с максимальным выводом ошибок, тоже ничего.

—
через 25 мин
попытался обновиться с 8.04 до 8.10
хотел скинуть инфу на другой комп, вызвал smbclient и опять bus error… ппц точняк потёрло что-н.
Кстати причина сбоя я обнаружил надеюсь это тольк она. Память не прошла memtest, переставил модули в другие слота всё ок.
сейчас идёт обновление. надеюсь поможет

« Последнее редактирование: 19 Декабря 2008, 08:58:39 от Belyaev Nikolay »

«Сначала они вас игнорируют, потом смеются над вами, потом борются с вами, а потом вы побеждаете»
Махатма Ганди

Belyaev Nikolay

нет похоже проблемы с материнкой. но пока денежек на замену не дают
переставил в другие разьёмы всё ок

«Сначала они вас игнорируют, потом смеются над вами, потом борются с вами, а потом вы побеждаете»
Махатма Ганди

Belyaev Nikolay

всё. обновился. и всё нормуль
похоже действительно память мне реально подпортила инфу на жёстком диске

вопрос, хотя он из области «чтобы было бы», но всё равно инетресно

Сейчас я обновился и переустановил все пакеты. А что бы надо было делать, если не было возможности обновиться? удалить какой-н глобальный переустановить какой-н глобальный пакет… но какой?

«Сначала они вас игнорируют, потом смеются над вами, потом борются с вами, а потом вы побеждаете»
Махатма Ганди

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